Electronic devices, for example field effect transistors (FETs) are used in display devices and logic capable circuits. A conventional FET typically includes source, drain and gate electrodes, a semiconducting layer made of a semiconductor (SC) material, and an insulator layer (also referred to as “dielectric” or “gate dielectric”), made of a dielectric material and positioned between the SC layer and the gate electrode. The semiconductor is for example an organic semiconductor (OSC), and the electronic device is for example an organic electronic (OE) device.
U.S. Pat. No. 7,029,945 B2 discloses embodiments of an organic field effect transistor (OFET) wherein the gate insulator layer is made of a dielectric material having a permittivity (∈) (also known as relative permittivity or dielectric constant (k)) of less than 3.0. Such materials, generally referred as “low k materials”, are reported to provide good mobility regardless of whether or not the organic semiconductor layer is disordered or semi-ordered. U.S. Pat. No. 7,029,945 B2 further reports that commercially available fluoropolymers such as Cytop™ (from Asahi Glass) or Teflon AF™ (from DuPont) are exemplary low k materials.
In WO 05/055248 the use of Cytop as gate insulator materials is disclosed as being advantageous for solution processed OFET devices where the OSC material is selected from soluble, substituted oligoacenes, such as pentacene, tetracene or anthracene, or heterocyclic derivatives thereof. These OSC materials are soluble in most common organic solvents. Therefore, when preparing a top gate FET, the solvents for the gate dielectric formulation have to be carefully chosen to avoid dissolution of the OSC material by the solvent of the gate dielectric formulation when deposited in adjacent layers. Such a solvent is generally referred to as being orthogonal to the material of the OSC layer. Similarly, when preparing a bottom gate device, the solvent for carrying the OSC material onto a previously formed gate dielectric layer is selected to be orthogonal to the gate dielectric material.
However, the above-mentioned fluoropolymers have certain drawbacks with regard to the mass production of OFET devices, specifically poor integration into processing and limited structural integrity. Regarding processability, fluoropolymers often do not adhere well to other layers, for example the substrate and OSC layer, among others, and often exhibits poor wettability. Regarding structural integrity, many fluoropolymers, such as those of the Cytop™ series, have low glass transition temperatures Tg (˜100-130° C.) which can be problematic when applying a metallized gate electrode layer over such a layer by a physical deposition method such as sputtering. If the fluoropolymer is heated to or above its Tg during such a sputtering process, cracking of the polymer due to built-in stress can occur and where such cracking is avoided, differential expansion between the fluoropolymer and any adjacent layer can result in wrinkling of the polymer. On the other hand, fluoropolymers with higher Tg, like those of the Teflon AF™ series (e.g. Teflon AF 2400 with Tg=240° C.), may overcome the wrinkling or cracking problems, but often do not coat substrates well and exhibit poor adhesion to additional layers.